The nanotubes are viewed to be a new approach in electronics with potential to drastically extent the frequency range of modem electronic devices. Such unique properties as quantization of the electron spectrum, ballistic electron propagation along the tube, current densities as high as 109 A/cm2, existence of the semiconductor phase, possibilities for n- and p- doping and fabrication of transistors, make the nanotubes a great candidate for future high-speed device technology.
Another very important application of the nanotubes is cold cathodes, which are based on low threshold electron field emission due to strong electrical field focusing at the nanotube end. Due to extremely small nanotube diameter, about 1 nm for a single walled nanotube, the electron emission threshold from the nanotube is within 0.1–1 V per micron of the anode-cathode space. This technology is currently under intense investigation for application to the flat panel displays.
It looks very promising to combine the solid-state device technology and cold cathode emission in a single device to produce a new approach in a hybrid, vacuum electronics, where the nanotube will be considered as an electron source. This approach will be extremely helpful in overcoming fundamental problems of the Si-based electronics. The electron velocity in vacuum as high as of 109 cm/s can be achieved, which is two orders of magnitude larger than electron velocity in the FET channel. This is a key factor for dramatic increase of the device operational frequency range. Additionally, due to vacuum dielectric constant equal to one, and specific vacuum device design capabilities, the input capacitances can be significantly reduced. There is no need in this case for decreasing the gate length to a submicron distances to increase the device frequency band width, and hence much more relaxed device processing can be implemented. In addition, high anode (output) voltages and currents, much grater than in Si FETs, are well within the capabilities of vacuum electronics. Finally, since the mechanism of electron field emission is essentially temperature independent, the temperature range of operation of the proposed hybrid devices will be much larger than that in similar semiconductor devices.
The problem of vacuum electronics is related to a reliable and compact electron source, to replace the commonly used hot filament cathode. The obvious alternative to the hot cathode is the cold cathode, which is typically formed as a metal tip from which electrons are extracted with the gate electrode, see e.g. C. A. Spind, U.S. Pat. No. 3,755,704. However, such a design has fundamental problems of a high input (emitter-gate) capacitance and relatively high threshold voltage for electron emission. In addition, this structure is three-dimensional and requires complex technique for its fabrication, not compatible with modem planar semiconductor IC technology. It seems therefore extremely attractive to attach improved, the nanotube-based, cold cathode emitter to a vacuum device fabricated with modern planar semiconductor IC techniques, to combine the best properties of the two technologies.
There have been several patents and publications, in which the nanotubes have been used as the electron source in the vacuum devices. The overwhelming majority of them is related to the field emission displays, which is currently the most advanced area for the field emission applications.
Several patents also utilize the nanotubes as electron sources in the vacuum electronic devices, such as M. Takai, U.S. Pat. No. 2003/0090190A1; K. M. Choi et al, U.S. Pat. No. 6,504,292; C. Bower et al, U.S. Pat. No. 6,630,772; S. Jin at al U.S. Pat. No. 6,250,984; E. Howard et al U.S. Pat. No. 6,626,720; L. Karpov et al U.S. Pat. No. 6,607,930, E. M. Howard et al , U.S. Pat. No. 6,626,720B1 and S. M. O'Rourke, U.S. Pat. No. 6,406,926.
There are several fundamental factors however which separate the proposed devices, according to the present invention, from the previous art:                1. In all the cited patents, the gate (input) electrode is made essentially on top of the cathode electrode, thereby making the input capacitance high and reducing the frequency of the device operation. In the proposed devices, the design is such that both input and output capacitances are minimized.        2. In all the cited patents, the nanotubes are deposited on a metal pad essentially as an indiscriminate mass in the form of an ink, powder, slurry, or electrophoretically. This significantly reduces the nanotube efficiency. In the proposed device, according to the present invention, each nanotube is treated individually and properly positioned to enhance the device performance. When multiple nanotubes are used, they represent an array of individual nanotubes grown on the preliminary prepared pads of a catalytic material. This implies that a single nanotube is sufficient for the device operation, and the nanotube array is used only to proportionally increase the emission current.        3. In all the cited patents, the controlling gate electrode serves to extract electrons from the nanotube, which inevitably creates undesirable effect of current leakage to the gate electrode. In the proposed devices, according to the present invention, the role of the gate electrode is wider and depends on the physical mechanisms involved. In some devices considered, the gate electrode can be biased negatively and thereby quenches the current to the anode. In this case, there is no current to the gate, which is an important factor for many three-terminal device applications. In one device presented, the gate voltage is applied to the nanotube itself through the film of an insulator, like in a regular FET. In another device, representing a new ballistic electron source, the controlling electrode is attached directly to the nanotube to produce a potential difference along the nanotube. Finally, in one of the three-terminal device designs, the gate is biased positively and extracts electrons from the nanotube thereby serving as a part of the electron cold cathode. All these features imply that the scope of physical processes considered in the present invention is much greater than those discussed in the cited patents.        3. In the cited patents, the described methods of the device fabrication include the procedure of nanotube placement onto the emitter metal pad somewhere in the middle of the device processing, after which other steps, including photolithography, are made. The subsequent technological operations after nanotube placement are known to adversely affect the nanotube efficiency as an electron source. In the proposed devices, the nanotube placement or growth is the last processing step in the device fabrication.        
Fig. A (Prior art) clearly demonstrates typical approach in making the nanotube based vacuum devices using multiple nanotubes deposited or grown on the entire cathode surface, see U.S. Pat. No. 6,626,720. The input capacitance of such a device is relatively high. The nanotube placement is followed by several processing steps, which may degrade the nanotube performance.